The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Complimentary metal oxide semiconductor (CMOS) technology is used for a variety of digital logic and analog circuitry. As CMOS technology evolves, lithographic nodes used in CMOS fabrication are being scaled down. For example, a 65 nanometer lithographic node (65 nm process) enables the fabrication of minimum circuit features to reach 35 nanometers. Various factors such as reductions in die size, transistor size, and power consumption and increases in gate count, density, response time, and speed are driving the transition from a 90 nm process node to the 65 nm process node.
CMOS receivers (e.g. input buffers) are a type of special-purpose CMOS circuits. CMOS receivers are used to adjust distorted signals into well-defined digital signals having the proper pulse widths and amplitudes. In order to operate efficiently, high-speed systems may include CMOS receivers.